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Fuzz Face Impedance Idea

7/21/2000 4:29 PM
Jay Doyle
Fuzz Face Impedance Idea
Spent another 8+ hours in the van recently and obsessed about another idea.  
In the process of coming up with the FET Punch, I ran into some problems with the FET biasing. Before R.G. so politely led me in the proper direction, I was having to raise the value of the Drain resistance to a point of the FET having too high an output impedance and loading the following stage.  
NOW, would it be possible to add an "improperly" biased (biased in the proper operating region but with higher than normal output impedance) FET amp in front of the Fuzz Face so the input then has the advantage of a high impedance to not load the signal down, but the fuzz face circuit isn't disrupted by the buffering due to the high output bias of the FET on the input?  
Does this make sense? And does anyone think that it could work?  
Jay Doyle
7/21/2000 5:21 PM

Thats what the 3tran is about. The 10k resistor and caps to the input is a very simple pickup sim. better would be a inductor,resistor setup.

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