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previous: Joe Fuzz Re: Question for J. Orman: Minibooster -- 9/8/1999 3:22 PM

Re:Minibooster Operation

9/8/1999 10:23 PM
R.G.	Re:Minibooster Operation I'll have to pull out some old texts to be sure, but I think this is what is going on. The two 1M's tie the gate of the first JFET at 1/2 the supply voltage. If the source were at exactly the same voltage as the gate, the current through the device would lie on the Vgs=0 line, which means that over the pinchoff voltage, the current would be Idss, from a few to maybe 20ma, depending on the JFET. The bottom JFET is held at Vgs=0, so it's trying to pull its own Idss through the top device. This pulls down on the top JFET's source turning it more on until the top device hits Idss also. With both devices trying to pull Idss, they will come to some kind of balance, with the voltage at the source of the top and drain of the bottom device determined by the relative matching of the two devices. If they're perfectly matched, the voltage at the output will be 4.5V, the same as the gate voltage on the top device. The gate and source of the top device are held together by that 0.01uf cap, so there is no AC voltage between the two. That means that the top JFET will act like a constant current source. The bottom JFET is biased at DC by the interaction of the two, and it sees a constant current source drain load, and a zero source load, so it runs at the maximum possible gain for the device. I simmed the thing and it looks like a gain of 20 to 50 depending on the device. This is an almost exact dupe of a triode circuit from a few decades ago, and works much the same way. Yeah, if you get some high Idss devices, it could pull a lot of current. Idss is commonly 5-15 ma for the recommended JFETs; a 9V battery is a 165ma-hr device, so you could get as little as 10 hours out of a battery, and it would run down quickly. As the transistors run the battery down, they will be balanced on the edge of the JFET triode region, so the tone will change all right.

9/8/1999 10:23 PM

R.G.

Re:Minibooster Operation

I'll have to pull out some old texts to be sure, but I think this is what is going on.

The two 1M's tie the gate of the first JFET at 1/2 the supply voltage. If the source were at exactly the same voltage as the gate, the current through the device would lie on the Vgs=0 line, which means that over the pinchoff voltage, the current would be Idss, from a few to maybe 20ma, depending on the JFET.

The bottom JFET *is* held at Vgs=0, so it's trying to pull its own Idss through the top device. This pulls down on the top JFET's source turning it more on until the *top* device hits Idss also.

With both devices trying to pull Idss, they will come to some kind of balance, with the voltage at the source of the top and drain of the bottom device determined by the relative matching of the two devices. If they're perfectly matched, the voltage at the output will be 4.5V, the same as the gate voltage on the top device.

The gate and source of the top device are held together by that 0.01uf cap, so there is no AC voltage between the two. That means that the top JFET will act like a constant current source. The bottom JFET is biased at DC by the interaction of the two, and it sees a constant current source drain load, and a zero source load, so it runs at the maximum possible gain for the device. I simmed the thing and it looks like a gain of 20 to 50 depending on the device.

This is an almost exact dupe of a triode circuit from a few decades ago, and works much the same way.

Yeah, if you get some high Idss devices, it could pull a lot of current. Idss is commonly 5-15 ma for the recommended JFETs; a 9V battery is a 165ma-hr device, so you could get as little as 10 hours out of a battery, and it would run down quickly. As the transistors run the battery down, they will be balanced on the edge of the JFET triode region, so the tone will change all right.

Replies:

Joe Fuzz R.G.: Thanks for the analysis. Jus... -- 9/9/1999 1:36 AM
EricH I don't know if this has any value,... -- 9/10/1999 2:10 PM